家电科技 ›› 2025, Vol. 0 ›› Issue (6): 51-55.doi: 10.19784/j.cnki.issn1672-0172.2025.06.008

• 论文 • 上一篇    下一篇

家用和类似用途电器RAM自检方法效率与覆盖性对比研究

魏明然1,2,3, 曹朔2,3, 陈向峰1, 戴昊2,3, 李嘉辉2,3   

  1. 1.中国家用电器研究院 北京 100176;
    2.中家院(北京)检测认证有限公司 北京 100176;
    3.国家智能家居质量检测检验中心 北京 100176
  • 出版日期:2025-12-01 发布日期:2026-04-03
  • 作者简介:魏明然,学士学位。研究方向:电子电路功能安全及失效分析。地址:北京经济技术开发区科创十三街31号院二区17号楼。E-mail:weimr@cheari.com。
  • 基金资助:
    国家重点研发计划NQI专项(项目编号:2022YFF0607100)

Comparative study on efficiency and coverage of RAM self-checking methods for household and similar electrical appliances

WEI Mingran1,2,3, CAO Shuo2,3, CHEN Xiangfeng1, DAI Hao2,3, LI Jiahui2,3   

  1. 1. China Household Electric Appliance Research Institute Beijing 100176;
    2. CHEARI (Beijing) Certification & Testing Co., Ltd. Beijing 100176;
    3. National Smart Home Quality Supervision & Inspection Center Beijing 100176
  • Online:2025-12-01 Published:2026-04-03

摘要: 随着半导体技术的飞速发展和在家电上的应用,传统家电产品正在从机械控制向电子控制、智能控制转变。在家电产品运行过程中,一些风险功能依靠软件防护,微控制单元(MCU)作为核心控制单元,其自身的可靠性直接关系到整个系统运行的稳定性。不同机构针对B类控制器中的可变存储器自检有不同的测试方法,针对两种自检方法——棋盘算法测试(0x55→0xAA→0x55)与多模式组合测试(0x00→0x55→0x33→0x0F→0xFF)的故障覆盖能力、实时性及资源消耗进行分析。通过对比优缺点,提出棋盘算法测试在检测中具备高效性与全面性的优势,并揭示多模式组合测试的潜在设计缺陷。研究结果为嵌入式系统与安全关键领域的RAM自检策略提供了优化方向。

关键词: MCU自检, 故障覆盖能力, 棋盘算法测试, 多模式组合测试

Abstract: With the rapid development of semiconductor technology and its application in home appliances, traditional home appliances are shifting from mechanical control to electronic control and intelligent control. Some risk functions in the operation of home appliances rely on software protection. As the core control unit, the reliability of the microcontroller unit (MCU) directly affects the stability of the entire system operation. Different institutions have different testing methods for the variable memory self-test (RAM) in B-class controllers. The fault coverage, real-time performance, and resource consumption of two self-test methods-Checkerboard memory test (0x55→0xAA→0x55) and multi-mode combination test (0x00→0x55→0x33→0x0F→0xFF) -are analyzed. By comparing the advantages and disadvantages, this paper proposes the advantages of chessboard algorithm testing in terms of efficiency and comprehensiveness in detection, and reveals the potential design flaws of multi-mode combination testing. The research results provide optimization directions for RAM self checking strategies in embedded systems and security critical fields.

Key words: MCU self-test, Fault coverage capability, Checkerboard memory test, Multi mode combination test

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